1 From 2a23e4944cfd54bbbc6757cc28970a57c027657b Mon Sep 17 00:00:00 2001
    2 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
    3 Date: Wed, 2 Dec 2020 18:29:29 +0100
    4 Subject: [PATCH 3/7] PCI: aardvark: Add support for DEVCAP2, DEVCTL2, LNKCAP2
    5  and LNKCTL2 registers on emulated bridge
    6 MIME-Version: 1.0
    7 Content-Type: text/plain; charset=UTF-8
    8 Content-Transfer-Encoding: 8bit
    9 
   10 PCI aardvark hardware supports access to DEVCAP2, DEVCTL2, LNKCAP2 and
   11 LNKCTL2 configuration registers of PCIe core via PCIE_CORE_PCIEXP_CAP.
   12 Export them via emulated software root bridge.
   13 
   14 Signed-off-by: Pali Rohár <pali@kernel.org>
   15 Signed-off-by: Marek Behún <kabel@kernel.org>
   16 Cc: stable@vger.kernel.org
   17 ---
   18  drivers/pci/controller/pci-aardvark.c | 15 +++++++++++----
   19  1 file changed, 11 insertions(+), 4 deletions(-)
   20 
   21 diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
   22 index c5300d49807a..25af189a1052 100644
   23 --- a/drivers/pci/controller/pci-aardvark.c
   24 +++ b/drivers/pci/controller/pci-aardvark.c
   25 @@ -884,8 +884,13 @@ advk_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
   26         case PCI_CAP_LIST_ID:
   27         case PCI_EXP_DEVCAP:
   28         case PCI_EXP_DEVCTL:
   29 +       case PCI_EXP_DEVCAP2:
   30 +       case PCI_EXP_DEVCTL2:
   31 +       case PCI_EXP_LNKCAP2:
   32 +       case PCI_EXP_LNKCTL2:
   33                 *value = advk_readl(pcie, PCIE_CORE_PCIEXP_CAP + reg);
   34                 return PCI_BRIDGE_EMUL_HANDLED;
   35 +
   36         default:
   37                 return PCI_BRIDGE_EMUL_NOT_HANDLED;
   38         }
   39 @@ -899,10 +904,6 @@ advk_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge,
   40         struct advk_pcie *pcie = bridge->data;
   41  
   42         switch (reg) {
   43 -       case PCI_EXP_DEVCTL:
   44 -               advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg);
   45 -               break;
   46 -
   47         case PCI_EXP_LNKCTL:
   48                 advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg);
   49                 if (new & PCI_EXP_LNKCTL_RL)
   50 @@ -924,6 +925,12 @@ advk_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge,
   51                 advk_writel(pcie, new, PCIE_ISR0_REG);
   52                 break;
   53  
   54 +       case PCI_EXP_DEVCTL:
   55 +       case PCI_EXP_DEVCTL2:
   56 +       case PCI_EXP_LNKCTL2:
   57 +               advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg);
   58 +               break;
   59 +
   60         default:
   61                 break;
   62         }
   63 -- 
   64 2.32.0
   65