diff --git a/drivers/net/wireless/ath/ath10k/core.c b/drivers/net/wireless/ath/ath10k/core.c index f49e05f32022..7ec307f76c9f 100644 --- a/drivers/net/wireless/ath/ath10k/core.c +++ b/drivers/net/wireless/ath/ath10k/core.c @@ -199,6 +199,33 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { .vht160_mcs_tx_highest = 0, }, { + .id = QCA6174_HW_3_2_VERSION, + .dev_id = QCA9377_1_0_DEVICE_ID, + .name = "qca6174 hw3.2 sdio", + .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, + .uart_pin = 6, + .otp_exe_param = 0, + .channel_counters_freq_hz = 88000, + .max_probe_resp_desc_thres = 0, + .cal_data_len = 8124, + .fw = { + /* uses same binaries as hw3.0 */ + .dir = QCA6174_HW_3_0_FW_DIR, + .board = QCA6174_HW_3_0_BOARD_DATA_FILE_SDIO, + .board_size = QCA6174_BOARD_DATA_SZ, + .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, + }, + .hw_ops = &qca6174_ops, + .hw_clk = qca6174_clk, + .target_cpu_freq = 176000000, + .decap_align_bytes = 4, + .spectral_bin_discard = 0, + .max_num_peers = TARGET_QCA6174_HL_NUM_PEERS, + .is_high_latency = true, + .bus = ATH10K_BUS_SDIO, + .start_once = true, + }, + { .id = QCA99X0_HW_2_0_DEV_VERSION, .dev_id = QCA99X0_2_0_DEVICE_ID, .name = "qca99x0 hw2.0", @@ -1745,6 +1772,7 @@ static int ath10k_init_hw_params(struct ath10k *ar) /* High latency devices will use different fw depending * on if it is a USB or SDIO device. */ + ath10k_err(ar, "%i %i, %x %x, %x %x\n", hw_params->bus, ar->hif.bus, hw_params->id, ar->target_version, hw_params->dev_id, ar->dev_id); if (hw_params->bus == ar->hif.bus && hw_params->id == ar->target_version && hw_params->dev_id == ar->dev_id) diff --git a/drivers/net/wireless/ath/ath10k/hw.h b/drivers/net/wireless/ath/ath10k/hw.h index daed76ff6e76..9420d7e85225 100644 --- a/drivers/net/wireless/ath/ath10k/hw.h +++ b/drivers/net/wireless/ath/ath10k/hw.h @@ -96,6 +96,7 @@ enum qca9377_chip_id_rev { #define QCA6174_HW_3_0_FW_DIR "ath10k/QCA6174/hw3.0" #define QCA6174_HW_3_0_BOARD_DATA_FILE "board.bin" +#define QCA6174_HW_3_0_BOARD_DATA_FILE_SDIO "board-sdio.bin" #define QCA6174_HW_3_0_PATCH_LOAD_ADDR 0x1234 /* QCA99X0 1.0 definitions (unsupported) */ @@ -688,7 +689,8 @@ ath10k_rx_desc_get_l3_pad_bytes(struct ath10k_hw_params *hw, #define TARGET_TLV_NUM_MSDU_DESC_HL 64 #define TARGET_TLV_NUM_WOW_PATTERNS 22 -/* Target specific defines for QCA9377 high latency firmware */ +/* Target specific defines for QCA6174 and QCA9377 high latency firmware */ +#define TARGET_QCA6174_HL_NUM_PEERS 15 #define TARGET_QCA9377_HL_NUM_PEERS 15 /* Diagnostic Window */