1 From 8edd73941707865c0baf1e20ed10c9c472e87b9a Mon Sep 17 00:00:00 2001 2 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org> 3 Date: Mon, 20 Jun 2022 14:34:02 +0200 4 Subject: [PATCH] fix after "net: dsa: mv88e6xxx: convert 88e639x to phylink_pcs" 5 6 --- 7 drivers/net/dsa/mv88e6xxx/pcs-639x.c | 44 +++++++++++++++------------- 8 1 file changed, 24 insertions(+), 20 deletions(-) 9 10 diff --git a/drivers/net/dsa/mv88e6xxx/pcs-639x.c b/drivers/net/dsa/mv88e6xxx/pcs-639x.c 11 index 3b24b1ce02da..274c64e31ca3 100644 12 --- a/drivers/net/dsa/mv88e6xxx/pcs-639x.c 13 +++ b/drivers/net/dsa/mv88e6xxx/pcs-639x.c 14 @@ -529,14 +529,14 @@ int mv88e6390_pcs_init(struct mv88e6xxx_chip *chip, int port) 15 16 /* Marvell 88E6393X Specific support */ 17 18 -static int mv88e6393x_power_up(struct mv88e639x_pcs *mpcs) 19 +static int mv88e6393x_power_lane_up(struct mv88e639x_pcs *mpcs) 20 { 21 return mv88e639x_modify(mpcs, MV88E6393X_SERDES_CTRL1, 22 MV88E6393X_SERDES_CTRL1_TX_PDOWN | 23 MV88E6393X_SERDES_CTRL1_RX_PDOWN, 0); 24 } 25 26 -static int mv88e6393x_power_down(struct mv88e639x_pcs *mpcs) 27 +static int mv88e6393x_power_lane_down(struct mv88e639x_pcs *mpcs) 28 { 29 return mv88e639x_modify(mpcs, MV88E6393X_SERDES_CTRL1, 30 MV88E6393X_SERDES_CTRL1_TX_PDOWN | 31 @@ -569,7 +569,7 @@ static int mv88e6393x_erratum_4_6(struct mv88e639x_pcs *mpcs) 32 if (err) 33 return err; 34 35 - return mv88e6393x_power_down(mpcs); 36 + return mv88e6393x_power_lane_down(mpcs); 37 } 38 39 /* mv88e6393x family errata 4.8: 40 @@ -675,7 +675,8 @@ static void mv88e6393x_sgmii_pcs_disable(struct phylink_pcs *pcs) 41 struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs); 42 int err; 43 44 - mv88e6393x_power_down(mpcs); 45 + mv88e639x_sgmii_pcs_disable(pcs); 46 + mv88e6393x_power_lane_down(mpcs); 47 48 if (mpcs->interface == PHY_INTERFACE_MODE_2500BASEX) { 49 err = mv88e6393x_fix_2500basex_an(mpcs, false); 50 @@ -708,7 +709,11 @@ static int mv88e6393x_sgmii_pcs_post_config(struct phylink_pcs *pcs, 51 return err; 52 } 53 54 - return mv88e6393x_power_up(mpcs); 55 + err = mv88e6393x_power_lane_up(mpcs); 56 + if (err) 57 + return err; 58 + 59 + return mv88e639x_sgmii_pcs_enable(pcs); 60 } 61 62 static const struct phylink_pcs_ops mv88e6393x_sgmii_pcs_ops = { 63 @@ -757,30 +762,20 @@ static int mv88e6393x_xg_control_irq(struct mv88e639x_pcs *mpcs, bool enable) 64 MV88E6393X_10G_INT_LINK_CHANGE, val); 65 } 66 67 -static int mv88e6393x_xg_pcs_enable(struct phylink_pcs *pcs) 68 -{ 69 - struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs); 70 - 71 - mpcs->handle_irq = mv88e6393x_xg_handle_irq; 72 - 73 - return mv88e6393x_xg_control_irq(mpcs, !!mpcs->irq); 74 -} 75 - 76 static void mv88e6393x_xg_pcs_disable(struct phylink_pcs *pcs) 77 { 78 struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs); 79 80 mv88e6393x_xg_control_irq(mpcs, false); 81 - mv88e6393x_power_down(mpcs); 82 + mv88e639x_xg_pcs_disable(mpcs); 83 + mv88e6393x_power_lane_down(mpcs); 84 } 85 86 /* The PCS has to be powered down while CMODE is changed */ 87 static void mv88e6393x_xg_pcs_pre_config(struct phylink_pcs *pcs, 88 phy_interface_t interface) 89 { 90 - struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs); 91 - 92 - mv88e6393x_power_down(mpcs); 93 + mv88e6393x_xg_pcs_disable(pcs); 94 } 95 96 static int mv88e6393x_xg_pcs_post_config(struct phylink_pcs *pcs, 97 @@ -799,11 +794,20 @@ static int mv88e6393x_xg_pcs_post_config(struct phylink_pcs *pcs, 98 return err; 99 } 100 101 - return mv88e6393x_power_up(mpcs); 102 + err = mv88e6393x_power_lane_up(mpcs); 103 + if (err) 104 + return err; 105 + 106 + err = mv88e639x_xg_pcs_enable(mpcs); 107 + if (err) 108 + return err; 109 + 110 + mpcs->handle_irq = mv88e6393x_xg_handle_irq; 111 + 112 + return mv88e6393x_xg_control_irq(mpcs, !!mpcs->irq); 113 } 114 115 static const struct phylink_pcs_ops mv88e6393x_xg_pcs_ops = { 116 - .pcs_enable = mv88e6393x_xg_pcs_enable, 117 .pcs_disable = mv88e6393x_xg_pcs_disable, 118 .pcs_pre_config = mv88e6393x_xg_pcs_pre_config, 119 .pcs_post_config = mv88e6393x_xg_pcs_post_config, 120 -- 121 2.35.1 122